S2 is a simple 32-bit processor for educational purpose. It
exists in a simulator, although some implementation at Hardware
Description
Language for S2 exists. S2 is developed from S1,
a simple 16-bit processor used in
teaching several classes in the past
10 years. S2 has an adequate instruction set to demonstrate the
high
level
language and the assembly language relationships. Comparing to
a real processor (such as Pentium), S2 lacks OS supporting functions,
I/O
and interrupts, and performance enhancing features (such as MMX).
ld r1,ads R[r1]
=
M[ads]
absolute
ld r1,#n
R[r1] =
n
immediate
ld r1,d(r2) R[r1] = M[ d +
R[r2] ] displacement
ld r1,(r2+r3) R[r1] = M[ R[r2] + R[r3]
] index
The opcode format and assembly language format for S2 follow the
tradition
dest = source1 op source2 from
PDP, VAX and IBM S360.
S2 instruction set
S2 opcode encoding
S2 micro steps
(to be continued)
last update 2 June 2003