sx2 microprogram v
1.0
15 July 2006
mux selector
x = {ts, fp, nx}
y = {ff, arg, u}
b = {tbus, dbus, sp}
d = {fp, ts, v, u}
a = {tbus, pc, sp, fp}
j = {pc1, pcarg, tbus}
pc1 is pc+1->pc
pcarg is pc+arg->pc
tbus is tbus->pc
so = {sp, spx}
sp is sp->spout
spx is {sp+1,
sp-1}->spout
si = {inc, dec, k, tbus}
inc is sp+1->sp
dec is sp-1->sp
k is sp+k->sp
tbus is tbus->sp
w = {v1, v2, v3, v4}
z = {dbus, ts}
t = {v, pc, bus}
u = {iru, dbus}
alu = {add, sub, inc, dec, add2,
z, eq, op, p1, p2}
load registers
lir, lts, lfp, lsp, lnx, lff, lpc,
lv1, lv2, lv3, lv4, lu,
mR, mW
next micro ads
ifT is if Z = 0 jump
ifF is if Z = 1 jump
ifu0 is if U = 0 jump
skipu is skip by MAXV - U
decode is jump by op code
trap is special
notation
push x
sp+1->sp
x->mW(sp)
pop x
mR(sp)->x
sp-1->sp
:fetch
mR(pc)->ir, decode
:bop
pop ff
alu(ts op ff)->ts,
pc+1, fetch
:uop
alu(ts op ?)->ts, pc+1,
fetch
:get
push ts
alu(fp-arg)->tbus,
mR(tbus)->ts, pc+1, fetch
:getX
push ts, v[X]->ts,
pc+1, fetch
:put
alu(fp-arg)->tbus,
ts->mW(tbus)
pop ts, pc+1, fetch
:putX
ts->v[X], pop ts, pc+1,
fetch
:ld
push ts
mR(arg)->ts, pc+1, fetch
:st {val}
ts->mW(arg)
pop ts, fetch
:ldx {ads idx}
pop ff
; pop ads
alu(ff+ts)->tbus,
mR(tbus)->ts, pc+1, fetch
:stx {ads idx val}
pop nx
; pop idx
pop ff
; pop ads
alu(nx+ff)->tbus,
ts->mW(tbus)
pop ts, pc+1, fetch
:lit
push ts
arg->ts, pc+1, fetch
:jmp
pc+arg, fetch
:jt
alu(ts=0), ifTrue j3
; if true, don't jump
:j2
; jump
pc+arg
pop ts, fetch
:j3
; don't jump
pop ts, pc+1, fetch
:jf
alu(ts=0), ifTrue j2
; if true, jump
pop ts, pc+1,
fetch ; jump
:call
; call with ret ads on ts
push ts, pc+1
; flush ts
pc->ts, if u=0
call2 ; save ret ads
<save v>
alu(fp-u)->fp, skipu
v4->mW(fp),
fp+1->fp
v3->mW(fp),
fp+1->fp
v2->mW(fp),
fp+1->fp
v1->mW(fp),
fp+1->fp
:call2
arg->tbus->pc,
mR(tbus)->ir ; fetch fun, arg->pc
fp->mW(sp+k),
sp+k->sp ; save old fp, new sp
sp->fp
; new fp
sp+1, u->mW(sp),
iru->u ; push old u, get new u
pc+1, if u=0 fetch
:cachev
<cache v>
alu(fp-u)->fp, skipu
mR(fp)->v4,
fp+1->fp
mR(fp)->v3,
fp+1->fp
mR(fp)->v2,
fp+1->fp
mR(fp)->v1,
fp+1->fp, fetch
:ret
; ret with retads on TS
; retv with retads on frame
sp-1->ff
alu(fp=ff), ifFalse r2
ts->pc
; <do ret>
mR(sp)->u
; pop u
alu(fp-arg)->sp
pop ts, if u=0 r3
mR(fp)->fp,
cachev ; restore fp
:r2
; <do retv>
alu(fp+2)->tbus,
mR(tbus)->ff ; ret ads
ff->pc
alu(fp+1)->tbus,
mR(tbus)->u ; pop u
alu(fp-arg)->sp, if u=0
r3 ; skip cachev
mR(fp)->fp cachev
:r3
mR(fp)->fp,
fetch ; end
:sys
:array
:end
trap, pc+1, fetch
End