Microprogramming for the instruction "add with displacement"

add-displacement
meaning
microsteps
revised S1 ISA
S1 microprogram
example
Include the add-displacement to the ISA of S1 and modify S1 microprogram, the simulator is called "S1mx"

                Instruction   addd r1, disp(r2)

Meaning

The displacement addressing is used to access a local variable in the stack frame (the activation record).  r2 is used to hold the frame pointer.  "disp" is the offset, which is the number of local variable, from the stack pointer.

Let ir:disp be the bit 2..0 of the S-format (3 bit displacement)

Meaning 1  (when the frame pointer itself must be dereferenced)

        R[ir:r1] = R[ir:r1] + M[ ir:disp + M[ R[ir:r2] ] ]

Meaning 2  (when the frame pointer is in r2)

        R[ir:r1] = R[ir:r1] + M[ ir:disp + R[ir:r2] ]

We will assume the second meaning (as it is faster)

Microsteps

<add-disp>
T = ADD( ir:disp, R[ir:r2])
MAR = T
MDR = M[MAR] // memory read
T = ADD( R[ir:r1], MDR )
R[ir:r1] = T
To implement this instruction, the datapath must be modified to enable ALU to get an operand from the databus (to get ir:disp).  We insert a multiplexor at one input of the ALU.  Originally, the ALU has two input operands called RA, RB.  Now the RB is "muxed" with the databus.  The RA can be R[ir:r1] or R[ir:r2].

Note: this is not very clean, that RA can be either R[ir:r1] or R[ir:r2].  However it will suffice to illustrate the concept.

We will add the control bits to the microprogram, called, MUX field, MUX = { RB, data }. Also the source field of the databus must add   src + { ir:disp }.   To read a register into port 1 of the alu we need two more control signals: r1p1, r2p1 which read R[ir:r1] to p1  and read R[ir:r2] to p1 respectively.  They are the signal of the selR field.

"trap c" in the pseudo instruction used in the simulator.  We use the instruction "trap 1" to print the content of R[0] to the screen, and "trap 0" to stop the simulation.
 

The revised S1 ISA is

// notation     op src dest      op r1 r2 ::  r1 = r1 op r2

load M r         M -> r
load (r1) r2     M[r1]  -> r2
store r M        r -> M
store r1 (r2)    r1 -> M[r2]
jmp cc A         jump condition
jal r A          jump and link  r store return ads
jr r             jump register
mov r1 r2        r1 -> r2
add r1 r2        r1 = r1 + r2
cmp r1 r2        set cc
inc r1
trap c           trap code c
addd r1 r2 disp  r1 = r1 + M[disp + r2]

op code format
L - format op:3,r0:3,ads:10
S - format op:3,xop:4,r1:3,r2:3,disp:3
M,A = ads
r,cc = r0
c = r1

op inst format
0 load L
1 store L
2 jmp L
3 jal L
4,5,6 undef L
7 xop S

xop inst  format
0 mov S
1 loadr S
2 storer S
3 add S
4 cmp S
5 inc S
6 jr S
7 addd    S
8 trap S
9..15 undef S

condition code bit Z S
0 always
1 EQ  equal   Z = 1
2 NE  not eq  Z = 0
3 LT  S = 1
4 LE  S = 1 or Z = 1
5 GE  S = 0 or Z = 0
6 GT  S = 0

The revised microprogram is:

S1 microprogram

loc label : dest src selR mux alu : Mcnt misc cond goto
0 ifetch  : mar pc  . . .
1 w0      : - - - - - : rd - mrdy w0
2         : ir mdr - - - : - pc+1 decode -
3 load    : mar ir:ads . . .
4 w1      : - - - - - : rd - mrdy w1
5         : r mdr ir:r0 - - : - - u ifetch
6 store   : mar ir:ads . . .
7         : mdr r ir:r0 - - : . . .
8 w2      : - - - - - : wr - mrdy w2
9         : - - - - - : - - u ifetch
10 loadr  : mar r ir:r1 . . .
11 w3     : - - - - - : rd - mrdy w3
12        : r mdr ir:r2 - - : - - u ifetch
13 storer : mar r ir:r2 . . .
14        : mdr r ir:r1 . . .
15 w4     : - - - - - : wr - mrdy w4
16        : - - - - - : - - u ifetch
17 mov    : - - ir:r1 rb pass1 . . .
18        : r t ir:r2 - - - : - - u ifetch
19 add    : - - ir:r12 rb add . . .
20        : r t ir:r1 - - : - - u ifetch
21 cmp    : - - ir:r12 rb sub: - -  u ifetch
22 inc    : - - ir:r12 rb add1 . . .
23        : r t ir:r1 - - : - - u ifetch
24 jmp    : - - - - - : - - testcc(ir:r0) ifetch (false)
25        : pc ir:ads - - - : - - u ifetch
26 jal    : r pc ir:r0 . . .
27        : pc ir:ads - - - : - - u ifetch
28 jr     : pc r ir:r1 - - - : - - u ifetch

loc label : dest src selR mux alu : Mcnt misc cond goto

29 addd   : - ir:disp r2p1 data add . . .
30        : mar t . . .
31 w5     : - - - - - : rd - mrdy w5
32        : - mdr r1p1 data add . . .
33        : r t ir:r1 - - : - - u ifetch
34 trap   : - - - - - : - - u ifetch

Example of the use of addd instruction

addd r0, 2(r2)

where
r2 holds frame pointer at &STACK
2  is the offset of a local variable no. 2  LV2
LV2 initially 8
r0 initially 1

    .org 0
ld ONE r0          0  0 0 21
ld FP r2           1  0 2 20
addd r0, 2(r2)     2  7 7 0 2 2
trap print         3  7 8 1 0
trap stop          4  7 8 0 0

    .data 20
FP 22              20 22
ONE 1              21 1
STACK 0            22 0
LV1 0              23 0
LV2 8              24 8

The result from executing the above program will be r0 = 9.  This example is in the file "in2.obj".