
tx1 change  
feedback from Tawan  20 Nov 2017

1) logic operations should be unsigned
< I am not sure that this is correct, but I should modify my simulator to conform the real ship>
arithmetic is two-complement

2) inc, dec should affects the overflow flag

what to do

1)  create a test source to see all the effect of the above
2)  modify logic, inc, dec

20 Nov 2017

8-bit arithmetic

+127
-128

overflow when result is greater than +127 or smaller than -128
observe from sign bit

example

+120     0111 1000
+105     0110 1001
----     ---------
+225     1110 0001  (-31) incorrect, overflow set

add different sign never overflow
add same sign and result different sign, overflow

sub different sign can cause overflow
sub same sign never overflow

Summary

For 8-bit arith, there are two new flags: C - carry, V - over/underflow
add/sub  affects  C,V  (there is no instruction that make use of these flags yet) and the result is also 8-bit sign-extended to make subsequence operation correctly signed.

F now acts like zero flag as well.  It is affected by add/sub, inc/dec

For all logical operations, because the operand size is 32-bit (int in C), the operations are alway correct for 8-bit input.

end
