.. mspec.txt     s2 microprogram
.s
x_r1
x_r2
x_r3
y_r1
y_r2
y_r3
z_ry
z_im
z_0
z_1
z_2
z_4
d_r1
d_r2
d_r3
a_ads
a_pc
a_tbus
j_pc1
j_ads
j_p1
r_mbus
r_tbus
r_pc
r_ads
alu_add
alu_pass1
alu_sub
alu_mul
alu_div
alu_and
alu_or
alu_xor
alu_shl
alu_shr
alu_pass2
alu_op
mr
mw
decode
jmp
jF
jT
jz
jnz
lmar
lpc
lir
lr
lt
.m
:fetch 
.. pc->mar, pc+1->pc
.. mr->ir, decode
	a_pc lmar j_pc1 lpc ;
	mr lir decode ;
:add
.. x=r2, y=r3, alu(add)->t
.. d=r1, t->r, fetch
	x_r2 y_r3 z_ry alu_add lt ;
	r_tbus d_r1 lr jmp /fetch ;
:bop
	x_r2 y_r3 z_ry alu_op lt ;
	r_tbus d_r1 lr jmp /fetch ;
:opim
	x_r2 z_im alu_op lt ;
	r_tbus d_r1 lr jmp /fetch ;
:lda
.. ads->mar
.. d=r1, mr->r, fetch
	a_ads lmar ;
	mr r_mbus d_r1 lr jmp /fetch ;
:ldi
.. ads->r, r=ads, d=r1, fetch
	d_r1 r_ads lr jmp /fetch ;
:ldd
.. x=r2, z=im, alu(add)->t
.. t->mar
.. mr->r, d=r1, fetch
	x_r2 z_im alu_add lt ;
	a_tbus lmar ;	
	mr r_mbus d_r1 lr jmp /fetch ;
:ldx
.. x=r2, y=r3, z=ry, alu(add)->t
.. t->mar
.. mr->r, d=r1, fetch
	x_r2 y_r3 z_ry alu_add lt ;
	a_tbus lmar ;
	mr r_mbus d_r1 lr jmp /fetch ;
:sta
.. ads->mar, r1->t
.. mw, fetch
	a_ads lmar x_r1 alu_pass1 lt ;
	mw jmp /fetch ;
:std
.. x=r2, z_im, alu(add)->t
.. t->mar, x=r1, alu(pass1)->t
.. mw, fetch
	x_r2 z_im alu_add lt ;
	a_tbus lmar x_r1 alu_pass1 lt ;
	mw jmp /fetch ;
:stx
.. x=r2, y=r3, z=ry, alu(add)->t
.. t->mar, x=r1, alu(pass1)->t
.. mw, fetch
	x_r2 y_r3 z_ry alu_add lt ;
	a_tbus lmar x_r1 alu_pass1 lt ;
	mw jmp /fetch ;
:jcc
.. if cond is false fetch
.. ads->pc fetch
	jF /fetch ;
	j_ads lpc jmp /fetch ;
:jal
.. pc->r1, ads->pc, fetch
	r_pc d_r1 lr j_ads lpc jmp /fetch ;
:jr
.. x=r1, j=p1, r->pc, fetch
	x_r1 j_p1 lpc jmp /fetch ;
:trap
	jmp /fetch ;
:xl
	jmp /fetch ;
:xd
	jmp /fetch ;
:xx 
.. search r1 x d
.. retval in r1
.. list x=r1, data d=r2, tmp=r3
.. 
.. 0->retval
.. :loop r1-0
.. jz fetch   ;; return 
.. r1->mar, mr->r3
.. r3-r2
.. jneq L1
.. 1->retval, jmp fetch ;; return
.. :L1 r1+1->t
.. t->mar, mr->r1, jmp loop
:loop	x_r2 z_0 alu_sub ;
	jnz /skip ;
	z_0 alu_pass2 lt ;
	r_tbus d_r1 lr jmp /fetch ;
:skip	x_r2 alu_pass1 lt ;
	a_tbus lmar ;
	mr r_mbus d_r1 lr ;
	x_r1 y_r3 z_ry alu_sub ;
	jnz /next ;
	z_1 alu_pass2 lt ;
	r_tbus d_r1 lr jmp /fetch ;
:next	x_r2 z_1 alu_add lt ;
	a_tbus lmar ;
	mr r_mbus d_r2 lr jmp /loop ;
.e
