โปรแกรม Assembly
📤 Export for iverilog
Copy prog.list into the nanoLADA/ directory and run make.
$ iverilog -o sim nano_sc_system.v nanocpu.v alu.v regfile.v extender.v adder.v mux2_1.v control.v memory.v rom.v && ./sim
Register File
Pipeline Stages
⚡ Load-use stall
Data Memory
word-addressed · non-zero only
—
Execution Log
Step or Run to see trace
Pipeline Diagram
rows=instructions · cols=cycles
Run to build diagram