2110732 Parallel Archietcture

This page contains resources for the parallel class being taught during the first semester of 2004.

Instructor: Veera Muangsin, Ph.D. and Natawut Nupairoj, Ph.D.

Announcement

• Slides for "Performance: Model, Metric, and Speedup" are available.
• Slides for "Parallel in CPU" and "Interconnection Networks" are available.
• Slides for the first 4 classes (except the second class) are available.

Slides

• 14 June 2004 - Introduction ( Introduction to Parallel Architecture and Grand Challenge Problems / Top-500 ).
• 21 June 2004 - Past, Present, and Future (no slide).
• 28 June 2004 - Parallelism ( Parallelism and Flynn's Taxonomy ).
• 5 July 2004 - Parallel Architecture ( Parallel Architecture and Basic Internetworking ).
• 12 July 2004 - Parallelism in CPU .
• 19 July 2004 - Interconnection Networks .
• 26 July 2004 - Mid-term week (no class).
• 2 August 2004 - Holiday (no class).
• 9 August 2004 - Performance: Model, Metric, and Speedup .

References

• R. Duncan, "A Survey of Parallel Computer Architectures", Computer, February 1990, pp. 5-16.
• M. August et al, "Cray X-MP: The Birth of a Supercomputer", Computer, January 1989, pp. 45-52.
• M. Schlansker et al, "Compilers for Instruction-Level Parallelism", Computer, December 1997, pp. 63-69.
• S. Vaughan-Nichols, "New Trends Revive Supercomputing Industry", Computer, February 2004, pp. 10-13.
• J. Dongarra and D. Walker, "The Quest for Petascale Computing", Computing in Science & Engineering, May/June 2001, pp. 32-39.
• T. Mattson, D. Scott, and S. Wheat, "A TeraFLOP Supercomputer in 1996: the ASCI TFLOP System", Proceedings of the 10th International Parallel Processing Symposium (IPPS'96), pp. 84-93.
• N. Saboo et al, "Emulating PetaFLOPS Machines and Blue Gene", Processdings of the 15th International Parallel and Distrubted Processing Symposium (IPDPS'01).
• S. Eggers et al, "Simultaneous Multithreading: A Platform for Next-Generation Processors", IEEE Micro, September/October 1997, pp. 12-19.
• L. Hammond, B. Nayfeh, and K. Olukotun, "A Single-Chip Multiprocessor", IEEE Computer, September 1997, pp. 79-85.
• C. Kozyrakis and D. Patterson, "A New Direction for Computer Architecture Research", IEEE Computer, November 1998, pp. 24-32.
• N. Boden et al, "Myrinet: A Gigabit-per-Second Local Area Network", IEEE Micro, February 1995, pp. 29-36.
• J. Liu et al, "Microbenchmark Performance Comparison of High-Speed Cluster Interconnects", IEEE Micro, January/February 2004, pp. 42-51.

Resources

• Online resources will be provided later.