Embedded Algorithm in Hardware: A Scalable Compact Genetic Algorithm
Prabhas Chongstitvatana
Keynote speaker
International Conference on Embedded Systems and Intelligent
Technology, Feb 9-11, 2011, Prince of Songkla University (Phuket
campus), Thailand.
Abstract
Compact Genetic Algorithm is a memory-less Genetic Algorithm. It
is extremely suitable for implementing in a form of hardware
circuit. A straight forward implementation has been proposed
since 2001. In order to extend the computational power of Compact
Genetic Algorithm, a scalable version is proposed. Embedding this
design into hardware required some consideration in communicating and
sharing information between computing units. This talk introduces
the concept of evolutionary algorithm as a kind of parallizable
computing units. The application of this type of computing unit
to evolvable hardware will be discussed.
Speaker Biography
Prabhas Chongstitvatana is a professor in the department of computer
engineering, Chulalongkorn University since 2007. He earned B.Eng. in
Electrical Engineering from Kasetsart University, Thailand in 1980 and
Ph.D. from the department of artificial intelligence, Edinburgh
University, U.K. in 1992. His research involves robotics, evolutionary
computation, computer architecture, bioinformatics and grid computing.
He is the member of Thailand Engineering Institute, Thai Academy of
Science and Technology, Thai Robotics Society, Thai Embedded System
Association, ECTI Association of Thailand and IEEE Robotics and
Automation Society.