Microprocessor Interface Lab

The schedule is arranged to help students to develop their design step by step.  Starting from designing and testing individual unit, the complete design will in integrated near the end of the semester.

There are check points along the way.  Students are required to hand in their report every two weeks.  (There are five reports).  The reports will be graded and return to students by the following week.  Two exams. will be hold in the "in-the-lab" style.  In the midterm exam, students demonstrate their work then will be asked to implement "in-time" some modification to their design.  The aim is to check if students really can perform the work by themselves.  The final exam is similar to the midterm exam. in addition students will demonstrate their design on the unseen benchmark programs.  There will be a number of benchmark programs ordering from easy to hard.  Bonus will be given to the work that shows ingenuity and high quality.

Assessment

Five reports    25
Midterm         30
Final              40
Bonus              5
Schedule (each take two weeks)
  1. ALU  (report 1)
  2. Data path  (report 2)
  3. Memory interface  (report 3)
  4. Control unit  (report 4)
  5. Integrated Processor
  6. Display
  7. Interface to System (final report)
The report must be hand in by the next week after ending each module.  Midterm will be at the end of Memory interface module schedule.  Final will be at the end of the course.