A very simple processor with the goal for small size, has the following
characteristics.
8-bit datapath
12-bit address space
separate program/data, program 16-bit width, data 8-bit width
one accumulator with 16 x 8-bit registers, (one specially named BP)
one level call
no interrupt
An instruction is 16-bit long (fixed length). The operation code field is 4 bits. There are three formats: Long, Register and Immediate. The format R and I have extended operation code size 4 bits. The immediate value is 8-bit sign extended.
L op:4 ads:12
R op:4 xop:4 r1:4 r2:4
I op:4 xop:4 d:8
The instruction set is based on an accumulator (one-address). The
result of operation is stored in the accumulator. Load and store
from the memory to accumulator is through direct address (lda/sta) with
12-bit address field. Load and store with index (ldx/stx) use a base
register (r15) and an index register. The effective address is
calculated by left-shifting base register 4 bit then add the value of
index register. This creates a block of accessible memory of size 256
bytes. There are 16 blocks, hence 4 K bytes memory address in total.
The result of logical operations is stored in one bit register, F. The
conditional jump (jt/jf) use this flag. The instructions: add, sub,
inc, dec
affect F
which acts like
a zero flag for these instructions.
lda ads ac = M[ads]
L
sta ads M[ads] = ac
L
jmp ads PC = ads
L
jt ads if F!=0 PC =
ads L
jf ads if F==0 PC =
ads L
call ads savretads, PC = ads L
ret PC =
retads -
clr r2 R[r2] =
0
R
inc r2 R[r2]++
R
dec r2
R[r2]--
R
add r2 ac = ac +
R[r2] R
sub r2 ac = ac -
R[r2] R
and r2 ac = ac & R[r2]
R
or r2 ac = ac | R[r2]
R
xor r2 ac = ac ^ R[r2]
R
eq r2 F = ac == R[r2]
R
lt r2 F = ac <
R[r2] R
le r2 F = ac <= R[r2]
R
gt r2 F = ac >
R[r2] R
ge r2 F = ac >= R[r2]
R
addi #d ac = ac + d
I
subi #d ac = ac - d
I
andi #d ac = ac & d
I
ori #d ac = ac | d
I
xori #d ac = ac ^ d
I
eqi #d F = ac == d
I
lti #d F = ac < d
I
lei #d F = ac <= d
I
gti #d F = ac >
d I
gei #d F = ac >=
d I
mva r2
ac =
R[r2]
R
mvr r2
R[r2] =
ac R
ldx r2 ac =
M[BP<<4+R[r2]] R
stx r2
M[BP<<4+R[r2]] = ac R
mvi #d ac =
d
I
trap #d
special
I
not ac = ~ac
-
TX1 has 12-bit address. Because data path is 8-bit, it uses BP
register (R15) with 4-bit offset to extend 8-bit data to 12-bit address.
This is one way to have 12-bit address without 12-bit arithmetic because
TX1 has only 8-bit arithmetic. To visualise the address space, you
can think of 12-bit address as 16 pages of 256-byte blocks (256x16 =
4096). To set "base-address" of each block correctly, the value of BP
including its effective address (in decimal) are shown in the table below.
block no BP effective address
0
0 0
1 16 256
2 32 512
3 48 768
4 64
1024
5 80 1280
6 96 1536
7 112 1792
8 128 2048
9 144 2304
10 160 2560
11 178 2816
12 192 3072
13 208 3328
14 224 3584
15 240 3840
In fact, because BP is 8-bit register, you can set BP so that these
256-byte blocks overlapped. Please note that the index cannot be
incremented "across" the 256-byte boundary because TX1 has only 8-bit
arithmetic, not 12-bit. You can still manage the effective address to go
across block-boundary by changing BP (with some elaborate code).
Sum all elements in an array of size 10
i = 0
sum = 0
while i < 10
sum += ax[i]
i++
i - R1, sum - R2
:sum
clr r1
clr r2
mvi #&ax
mvr bp ; bp =
&ax
:loop
mvi #10
gt r1
jf exit
ldx r1 ; ac =
ax[i]
add r2
mvr r2 ;
update sum
inc r1 ; i++
jmp loop
exit:
; printing a table of 256 values
; use count down from 0 until reach 0 again (256 times)
; base address -- r1, index -- r2
; count loop -- r3
.code 0
mvi #16 ; ax at 0x0100, bp 0x10
mvr bp
clr r2 ; index 0
clr r3 ; count start 0
:loop
ldx r2
trap #1 ; print AC
inc r2
dec r3
jf loop
trap #0 ; stop
.data 256 ; table of 260 values at 0x0100 (page 1)
0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
...
250 251 252 253 254 255 256 257 258 259
.end
The tools include an assembler and a simulator. It works under 'console'. First assemble a source to generate an object code. Assume the input is "suma.txt", the assembler generates "suma.obj" which is used by the simulator.
C:\tx1\test>atx1 suma.txt
C:\tx1\test>type suma.obj
a 0
R 13 0 1
R 13 0 2
I 15 10 4
R 14 11 15
. . .
R 13 1 1
L 3 4
I 15 11 0
a 64
w 1
w 2
w 3
. . .
w 10
e
You can run the program under the simulator. The command 't' runs single step, 'g' runs until stop, 'r' shows all registers.
C:\test>simtx1 suma.obj
load program, last address 74
>t
PC 0 clr r1 F:0
ac:0 r0:0 r1:0 r2:0 r3:0 r4:0 r5:0 r6:0 r7:0 r15:0
>t
PC 1 clr r2 F:0
ac:0 r0:0 r1:0 r2:0 r3:0 r4:0 r5:0 r6:0 r7:0 r15:0
>t
PC 2 mvi #4 F:0
ac:4 r0:0 r1:0 r2:0 r3:0 r4:0 r5:0 r6:0 r7:0 r15:0
>g
stop, clock 88
>r
r0 :0 r1 :10 r2 :55 r3
:0 r4 :0 r5 :0 r6
:0 r7 :0
r8 :0 r9 :0 r10:0
r11:0 r12:0 r13:0
r14:0 r15:4
>q
The 'h' gives the list of available commands.
>h
g - go
t - single step
b ads - set breakpoint
s [rn,mn,pc] v - set
d ads n - dump
r - show register
q - quit
h - help
>
Enjoy
last update 22 Nov 2017