List of Papers

How to do a paper

Due date is 30th August 1999

  1. 1997 IEEE COMPUTER , Vol. 30, No. 3:  MARCH 1997,  pp. 65-73, Composite Arithmetic: Proposal for a New Standard, W. Neville
  2. 1997 IEEE COMPUTER, Vol. 30, No. 4:  APRIL 1997,  pp. 51-58, Toward Systematic Design of Fault-Tolerant Systems, Algirdas Avizienis
  3. 1997 IEEE COMPUTER, Vol. 30, No. 5:  MAY 1997,  pp. 71-81, Branch Effect Reduction Techniques, Augustus K. Uht, Vijay Sindagi, Sajee Somanathan
  4. 1997 IEEE COMPUTER, Vol. 30, No. 11:  NOVEMBER 1997,  pp. 67-76, Asynchronous Processor Survey, Tony Werner, Venkatesh Akella
  5. 1997 IEEE COMPUTER, Vol. 30, No. 12:  DECEMBER 1997,  pp. 33-37, Challenges to Combining General-Purpose and Multimedia Processors, Thomas M. Conte, Pradeep K. Dubey, Matthew D. Jennings, Ruby B. Lee
  6. 1997 IEEE COMPUTER, Vol. 30, No. 12:  DECEMBER 1997,  pp. 63-69, Compilers for Instruction-Level Parallelism, Michael Schlansker, Thomas M. Conte, James Dehnert, Kemal Ebcioglu
  7. 1997 IEEE MICRO, Vol. 17, No. 2:  MARCH/APRIL 1997,  pp. 11-19, Talisman: Multimedia for the PC , Martin Randall
  8. 1997 IEEE MICRO, Vol. 17, No. 2:  MARCH/APRIL 1997,  pp. 27-32, The HP PA-8000 RISC CPU, Ashok Kumar
  9. 1997 IEEE MICRO, Vol. 17, No. 2:  MARCH/APRIL 1997,  pp. 34-44, A Case for Intelligent RAM, David Patterson, Thomas Anderson, Neal Cardwell,  Richard Fromm
  10. 1997 IEEE MICRO, Vol. 17, No. 2:  MARCH/APRIL 1997,  pp. 45-53, picoJava-I: The Java Virtual Machine in Hardware, J. Michael O'Connor, Marc Tremblay
  11. 1997 IEEE MICRO, Vol. 17, No. 3:  MAY/JUNE 1997,  pp. 36-43, Compiling Java Just in Time, Timothy Cramer, Richard Friedman, Terrence Miller, David Seberger, Robert Wilson, Mario Wolczko
  12. 1997 IEEE MICRO, Vol. 17, No. 4:  JULY/AUGUST 1997,  pp. 12-19, ARM7TDMI Power Consumption , Simon Segars
  13. 1997 IEEE MICRO, Vol. 17, No. 5:  SEPTEMBER/OCTOBER 1997,  pp. 12-19, Simultaneous Multithreading: A Platform for Next-Generation Processors , Susan J. Eggers, Joel S. Emer, Henry M. Levy
  14. 1997 IEEE MICRO, Vol. 17, No. 5:  SEPTEMBER/OCTOBER 1997,  pp. 20-27, Exploiting Instruction- and Data-Level Parallelism , Roger Espasa, Mateo Valero
  15. 1997 IEEE MICRO, Vol. 17, No. 5:  SEPTEMBER/OCTOBER 1997,  pp. 40-49, Two Fast and High-Associativity Cache Schemes , Chenxi Zhang, Xiaodong Zhang, Yong Yan
  16. 1997 IEEE MICRO, Vol. 17, No. 5:  SEPTEMBER/OCTOBER 1997,  pp. 64-71, Virtual-Address Caches Part 1: Problems and Solutions in Uniprocessors , Michel Cekleov, Michel Dubois
  17. 1997 IEEE MICRO, Vol. 17, No. 6:  NOVEMBER/DECEMBER 1997,  pp. 10-17, Trends in Semiconductor Memories , Yasunao Katayama
  18. 1997 IEEE MICRO, Vol. 17, No. 6:  NOVEMBER/DECEMBER 1997,  pp. 18-28, Direct Rambus Technology: The New Main Memory Standard , Richard Crisp
  19. 1997 IEEE MICRO, Vol. 17, No. 6:  NOVEMBER/DECEMBER 1997,  pp. 55-62, Limited Bandwidth to Affect Processor Design , Doug Burger, James R. Goodman, Alain Kägi
  20. 1997 IEEE MICRO, Vol. 17, No. 6:  NOVEMBER/DECEMBER 1997,  pp. 69-74, Virtual-Address Caches, Part 2: Multiprocessor Issues, Michel Cekleov
  21. 1997 IEEE MICRO, Vol. 17, No. 5:  SEPT/OCT 1997, pp. 12-19, Simultaneous Multithreading: A Platform for Next-generation Processors, Susan Eggers, Joel Emer, Henry Levy, Jack Lo, Rebecca Stamm, and Dean Tullsen
  22. Some Conference ?,  Exploiting Instruction- and Data-Level Parallelism, Roger Espasa and Mateo Valero, 10 pages. ( here for the full paper billion.ps.zip)
  23. Proceedings of the 25th International Symposium on Computer Architecture, July, 1998, integrated Predicated and Speculative Execution in the IMPACT EPIC Archtecture, David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, and Wen-mei W. Hwu, 11 pages, (here for the full paper isca-98-epic.pdf)
  24. Proceedings of the 25th International Symposium on Computer Architecture, 1997, "The Energy Efficiency of IRAM Architectures,"  Richard Fromm, Stylianos Perissakis, Neal Cardwell, Bruce  McGaughy, Christoforos Kozyrakis, David Patterson, Thomas Anderson and Kathy Yelick, Univ. of  California-Berkeley, 11 pages.  ( here for the full paper isca97.ps.zip)
  25. IEEE Computer, November 1998, pp.24-32, "A new direction in computre architecture research", C. Kozyrakis and D. Patterson.  ( here for the full paper NewDirCompArch.pdf)
  26. Childers, B. and Davidson, J., Application-specific pipelines for exploiting instruction-level

    27. parallelism, CS paper on computer architecture, department of computer science,  U. of Virginia. CS-98-14, 10 pages.  (here for the full paper CS-98-14.ps.zip)