comp arch for ICE  2020

dsys/2018/index-dsys.htm

use 4 chapter (slides) of CAQA
  performance
  memory hierarchy
  instruction level parallelism
  data parallelism

interrupt (s21. interrupt) but:
  need to understand assembly language first

related to internal
  pipeline
  superscalar
  cache memory
  virtual memory

first part is the overview
second part is drill down

plan for 12 weeks

first six:

performance
memory
parallelism
  pipeline
  superscalar

second six:

cpu cycle
simple cpu 
assembly language
interrupt programming


resources

CAQA 6th ed at amazon:
https://www.amazon.com/Computer-Architecture-Quantitative-Approach-Kaufmann/dp/0128119055

relate to the textbook
(based on 5th ed)

use
chapter 1,2,3
some chapter 4  GPU
appendix B virtual memory