branch instruction uses "pc-relative addressing" which is
pc plus immediate value embedded in the instruction
see fig. 2.17 page 125
the address of instruction memory is aligned on "word" boundary
a general address of memory is at byte boundary
a "word" is four byte therefore pc-relative address will have the last two-bit as "00" (word boundary)
without going into details how the immediate value embedded in the  instruction is unravelled, (it is embedded in "funct7" and "func3" field totally 12 bits), you can assume that it is 12-bit value to be sign-extended and this value is "offset in multiple of 2 in B-format" (see the RISC-V instruction manual section 2.3 page 12).
so this value needed to be left shifted by 2 (again to make the final result ended with "00" bits). 
it has something to do with making the multiplexor circuit a bit smaller.

21 feb 2023