CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (99 pages)
MAJOR : 1621 IDNO. : C415409 ISBN : 974-579-995-5
NAME : นายชินวัฒน์ นาคอุดม
Chinawat Nak-udom
TOPICS: แผนการบำรุงรักษาเครื่องกำเนิดไฟฟ้าที่คำนึงถึงระดับความเชื่อถือได้และค่า ใช้จ่ายในการผลิต
Maintenance Scheduling of Electric Generators with Reliability and Production Cost Consideration
ADVISOR : ศ.ดร.จรวย บุญยุบล%อ.ดร.บัณฑิต เอื้ออาภรณ์
Prof. Charuay Boonyubol, Ph.D.%Asso.Prof. Bundhit Eua-arporn, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : MAINTENANCE SCHEDULING % RELIABILITY % PRODUCTION COST
ABSTRACT :
This thesis presents a method for determining the maintenance scheduling generating units with reliability and production cost consideration. Probabilistic approach is used to determine the performance and to evaluate reliability indices and production cost of power system. The calculation is performed by using round off techniques together with a developed algorithm to calculate an optimal maintenance plan. A computer program is developed on a microcomputer to determine maintenance scheduling of a power system and used to analyse an IEEE standard test system. The result shows that the developed method can be used to find an optimal plan within a short computing time. Within the developed program, the maintenance scheduling plan for a system with more than 100 generating units can be computed within a short period of time.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (93 pages)
MAJOR : 1621 IDNO. : C415599 ISBN : 974-633-806-4
NAME : นายธีรโรจน์ เพ้งหล้ง
Teeraroj Penglong
TOPICS: การจ่ายโหลดอย่างประหยัดที่คำนึงถึงข้อจำกัดการปล่อยก๊าซพิษจากโรงไฟฟ้า
Economic Dispatch with Emission Constraints
ADVISOR : ศ.ดร.จรวย บุญยุบล%อ.ดร.บัณฑิต เอื้ออาภรณ์
Prof. Charuay Boonyubol, Ph.D.%Bundhit Eua-Arporn, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : ECONOMIC DISPATCH % EMISSION CONSTRAINTS
ABSTRACT :
This thesis presents a method to calculate the economic dispatch with emission constraints employing multi objective optimization technique and linear programming. With the employed method, the generation is dispatched with a minimum total production cost and least emission of sulfur dioxide. A computer program is developed on a microcomputer using pascal programming language as a tool for the research. Results of the research show that the optimal power dispatch causing least sulfur dioxide emission can be obtained.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (126 pages)
MAJOR : 1621 IDNO. : C415619 ISBN : 974-632-840-9
NAME : นายวิรัตน์ สมาดเอียด
Virath Samadeald
TOPICS: การออกแบบวงจรแปลงผันไฟตรง-ไฟสลับแบบเรโซแนนซ์อนุกรมคู่
A Dsign of A Dual Series Resonant DC-TO-AC Converter
ADVISOR : รศ.ดร.โคทม อารียา
Asso.Prof. Gothom Arya, DR. ING
DEPARTMENT OF Master. Engineering (Power Electronics)
KEYWORDS : DUAL SERIES RESONANT CONVERTER(DSRC) % PHASE-SHIFT CONTROL
ABSTRACT :
This thesis presents a design, construction and testing of a dc-to-ac converter using an HF transformer and a line-frequency unfolding circuit. The regulated output voltage is nearly constant when the dc input varies in the range of 160-200 volts. The control technique consists of varying the phase-shift between driving signals of two half-bridge circuits, the voltage difference of which provides the output voltage. Resonant technique is used to reduce switching loss. The envelope of the output voltage of the HF transformer is an absolute sine. By rectifying and filtering the high-frequency components of this voltage, a rectified wave is obtained. A line-frequency unfolding circuit converts this into a sine-wave of 220 volts, 50 Hz. The output power is 500 watts.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (82 pages)
MAJOR : 1621 IDNO. : C515425 ISBN : 974-633-284-8
NAME : นายอรุณ หัตถะรัชต์
Arun Hattarach
TOPICS: การสังเคราะห์แบบประสานในการหาค่าตัวแปรของสเตบิไลเซอร์ในระบบไฟฟ้ากำลังที ่มีเครื่องกำเนิดไฟฟ้าหลายเครื่อง
Coordinated Synthesis of Parameters of Power System Stabilizers In Multi Machine System
ADVISOR : รศ.ดร.สุขุมวิทย์ ภูมิวุฒิสาร
Asso.Prof. Sukumvit Phoomvuthisan, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Power System)
KEYWORDS : SYNTHESIS % PARAMETERS % STABILIZERS % MULTI MACHINE
ABSTRACT :
This thesis has the objective to present a calculation method and computer program to determine parameters of power system stabilizers in a multimachine electrical power system which will be tuned to achieve the assigned dynamic stability. This thesis has demonstrated the procedure to construct state space model of the electrical power system from the linearized models of the following equipment:generator, load, transmission line, power system stabilizer, excitation system and terminal voltage transducer. Then, dynamic stability of the system and power system stabilizers parameters will be calculated from the state space model. Input of the power system stabilizers in this thesis are rotor speed. A test result from simulated electrical power system is shown. A computer program is developed from MATLAB program. The number of new functions for this thesis are added in the set of existing functions. The program requires at least Intel 80386 processor computer with Window 3.1 operating system for processing.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (118 pages)
MAJOR : 1621 IDNO. : C515466
NAME : นายชยา ลิมจิตติ
Chaya Limchitti
TOPICS: เครื่องควบคุมระบบจอภาพโทรทัศน์ที่จัดวางแบบอาร์เรย์
A Television Array Controller
ADVISOR : รศ.กฤษดา วิศวธีรานนท์
Asso. Prof. Krisada Visavateeranon
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : TELEVISION % DISPLAY PANEL % CONTROLLER % VIDEOWALL
ABSTRACT :
The objective of this research is to design a television array controller and to build a prototype of 2x2 sets of televisions system. The input composite video signal is first separated into R,G,B signals and then converted to digital signal . The digitized signals are kept in the memory as image data and are separated into blocks corresponding to each screen. The image data are converted back to composite video signal and sent out to each television. The circuits of the controller are designed and a prototype of 2x2 screens system is constructed. The input video signal can be shown in real time on four separated TV screens. The horizontal resolution of the image shown is 512 pixels.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (161 pages)
MAJOR : 1621 IDNO. : C515519 ISBN : 974-633-886-2
NAME : นายคิดชาย อุณหศิริกุล
Kidchai Unhasirikul
TOPICS: การคำนวณค่ายูนิตคอมมิตเมนต์ในระบบไฟฟ้ากำลังขนาดใหญ่โดยใช้วิธีรีแล็กเซชันแบบลากรองจ์
Unit Commitment Calculation in A Large-Scale Power System Using Lagrangian Relaxation
ADVISOR : อ.ดร.บัณฑิต เอื้ออาภรณ์
Dr. Bandhit Eua-arporn
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : UNIT COMMITMENT % LAGRANGIAN RELAXATION
ABSTRACT :
The objective of the thesis is to calculate unit commitment of a large scale power system using lagrangian relaxation method. A computer program is developed on a microcomputer for study and analysis. This program is applied to solve the unit commitment problem of test systems, consisting 110 thermal units. The results indicate that the larger the system is ,the smaller the duality gap will be obtained. With the employed method the obtained feasible solution will be closer to suboptimal solution. With the dynamic programming method employed in solving the subproblem and the independent number of iteration from the size of generation system for solving the lagrangian relaxation method, therefore the computation time linearly increases in proportion to the number of generating units.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (154 pages)
MAJOR : 1621 IDNO. : C515527 ISBN : 974-634-108-1
NAME : นายกิติพจน์ สิทธิเลิศพิศาล
Kitiphot Sitilertpisan
TOPICS: วงจรกรองกำลังแอกทีฟแบบอนุกรมสำหรับลดฮาร์มอนิกและรักษาระดับแรงดัน
A Series Active Power Filter As A Harmonic Suppressor and Voltage Stabilizer
ADVISOR : อ.ดร.สมบูรณ์ แสงวงค์วาณิชย์
Dr. Somboon Sangwongwanich
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : SERIES ACTIVE POWER FILTER % HARMONIC SUPPRESSOR % VOLTAGE
ABSTRACT :
In this thesis, we study the benefits and disadvantages of several kinds of harmonic filters, and propose a novel series active power filter (SAPF) for suppressing the harmonic currents flowing between the power source and loads. At harmonic frequencies, the SAPF will behave like a series resistor inserted between the source and loads. In addition, at the fundamental frequency, the SAPF will then behave like a series capacitor or inductor inserted between the source and loads for compensation of the voltage drop and improving the power factor of the system. Calculation of harmonic suppression voltage is carried out through space vector representation which uses the synchronously rotating frame of the fundamental frequency (50 Hz) as a reference frame. Stability analysis of the harmonic suppression system is also discussed using the Nyquist Plot. Experimental results verify the feasibility of the proposed series active power filter.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (83 pages)
MAJOR : 1621 IDNO. : C515550 ISBN : 974-632-921-9
NAME : นายณัฐกิจ ทองสว่าง
Natkij Tongswang
TOPICS: การวิเคราะห์สมรรถนะของสวิตช์กลุ่มข้อมูลที่มีสิทธิ์ก่อน
Performance Analysis of Fast Packet Switch with Preemptiye Priority Queue
ADVISOR : รศ.ดร.ประสิทธิ์ ประพิณมงคลการ
Asso. Prof. Prasit Prapinmongkolkarn, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : PERFORMANCE % PACKET SYITCHX PREEMPTIYE
ABSTRACT :
The purpose of this paper was to increase the throughput of nonblocking switch by arranging the priority packet into 2 levels which were high priority packet and low priority packet. The study of J. S. C. Chen and R. Guerin (1991) showed that the maximum throughput of 64x64 nonblocking switch was attained at the arrival rate of high priority packet 0.45 by using an approximate analysis. The result of this study found that the exact number of high priority packets which gave the maximum throughput was 0.375 and L. Li, C. Hu and P. Liu (1994) showed that the maximum throughput of 128x128 nonblocking switch was attained at the arrival rate of high priority packets 0.425 by using the iteration method. The result of this study found that the exact number of high priority packets which gave the maximum throughput was 0.421875. However,only the arrival rate of high priority packet was used in J. S. C. Chen and L. Li study. The result of this research was found that the maximum throughput depended on the arrival rate of the high priority packets and the number of inputs. The maximum throughput of switch was found between 0.25 and 0.5. As an example,when the switch had 4096 input ports,the arrival rate of high priority packet which yielded the maximum throughput was 0.4531. The minimum buffers which were used for preventing the loss of packets is between 27.6 and 100 percent of time slots. The waiting time is between 13 and 23 percent of time slots and the delay time is between 14 and 24 percent of time slots.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (96 pages)
MAJOR : 1621 IDNO. : C515635 ISBN : 974-634-433-1
NAME : นายประเสริฐ รังสีโสภณอาภรณ์
Prasert Rungsrisopoan-Aporn
TOPICS: การออกแบบและสร้างอิมพัลส์โวลเตจดิไวเดอร์ขนาด 1000กิโลโวลต์
Design and Construction of 1000 kv Impulse Voltage Divider
ADVISOR : รศ.ดร.สำรวย สังข์สะอาด
Asso.Prof. Samruay Sangkasaad, Dr.Sc.Techn
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : IMPULSE VOLTAGE DIVIDER % BIL
ABSTRACT :
This thesis reports the design and construction of 1000 kV resistor and capacitor type impulse voltage dividers. The capacitor voltage divider is damped with either external resistor or external and internal distributed resistors along the high voltage part. For resistor type, the high voltage part is made of Ni-Cr resistance wire wound non-inductively which gives the resistance of 9.77 k.... The scale factor of the voltage divider is 884.94 and 38217.5 for the whole resistive measuring system. In case of capacitor type, the high voltage part consists of a large number of small polyester film capacitors connected in parallel and in series which gives the effective capacitance of 385.81 pF. The scale factor of the voltage divider is 1030.65 and 38883.4 for the whole capacitive measuring system. The tests of both impulse voltage divider characteristics were performed in accordance with IEC 60-2 (1994), including: step response measurement with the effect of shielding to resistor type, scale factor, dynamic behaviour, linearity and withstand voltage tests at 110 % of rated voltage. The comparative measurement between both constructed impulse voltage dividers was carried out. The test results show that both impulse voltage divider characteristics meet the requirements of standard specifications.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (60 pages)
MAJOR : 1621 IDNO. : C515643 ISBN : 974-632-602-3
NAME : นายระพีพัฒน์ เพ็ญศิริ
Rapeepat Pensiri
TOPICS: การรู้จำเสียงพูดตัวเลขไทยโดยไม่ขึ้นต่อผู้พูดโดยการใช้ไดนา-มิกไทม์วาร์ปปิง
Speaker-Independent Thai Numerical Voice Recognition by Using Dynamic Time Warping
ADVISOR : รศ.ดร.สมชาย จิตะพันธ์กุล
Asso. Prof. Somchai Jitaphunkul, Dr.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : SPEAKER-INDEPENDENT % THAI NUMERICAL % VOICE RECOGNITION %
ABSTRACT :
This thesis has the objective to study on speaker-independent Thai numerical voice recognition by using dynamic time warping. In analysis to find a pattern uses isolated word by discrete Hartley transform in each frame of voice. Then, to find parameters of pattern of each word, after that to calculate distance between a test pattern and a reference pattern. This proposed method results the zero to nine independent voice recognition rate 79.25 percent with 20 testing persons, 87.17 % with 20 training persons with 600 words and zero to nine, "sib", "ed", "yee", "roy", "pan", "hmuan", "san", "lan" independent voice recognition rate 74.07 percent with 20 training persons with 1080 word,by testing on IBM PC/AT compatible. Good voice recognition result is depended on voice parameter selection and shows that using DTW for this technique is appropriate for no many voice recognized patterns.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (69 pages)
MAJOR : 1621 IDNO. : C515692 ISBN : 974-634-368-8
NAME : นายสมศักดิ์ คงถาวรวัฒนา
Somsak Kongthawattna
TOPICS: การรู้จำสายอักขระไทยตัวพิมพ์โดยวิธีซินแทกติก
Recognition of Thai-Printed Character String by The Syntactic Method
ADVISOR : รศ.ดร.สมชาย จิตะพันธ์กุล
Asso. Prof. Somchai Jitapunkul, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : RECOGNITION % SYSTACTIC % THAIPRINTED CHARCTER
ABSTRACT :
This thesis proposed to use the syntactic method to-recognize Thai-printed character string. The process composed of 3 steps, image segmentation based on edge detection technique, character sorting obtained from the determination of base line and the size of characters and lastly the character recognition process using the syntactic method (Sonthaya 1994). The input file was limited to EucrosiaUPC font of 18 points only. From the experiment using 150 character strings with 1X974 characters in total, resulted in 92.70 percent, 4.4 percent, and 2.9 percent of correct, wrong, and undecided recognition rates respectively.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (320 pages)
MAJOR : 1621 IDNO. : C515752 ISBN : 974-634-551-6
NAME : นายทวีชัย เจริญเศรษฐศิลป์
Taweechai Charoensedtasin
TOPICS: การออกแบบและพัฒนาชุดฝึกทดลองไมโครคอมพิวเตอร์โดยใช้ไอบีเอ็มพีซี
Design and Development of An IBM PC Based Microcomputer Training Set
ADVISOR : ศ.ดร.มงคล เดชนครินทร์%รศ.กฤษดา วิศวธีรานนท์
Prof. Mongkol Dejnakarintra, Ph.D.%Asso.Prof. Krisada Visavateeranon
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : MICROCOMPUTER % TRAINING SET % IBM PC % C PROGRAMMING
ABSTRACT :
The objective of this research is to design and construct a microcomputer training set used for teaching a microcomputer laboratory. The students can use the training set to learn how to use microcomputers for a control system. The microcomputer used with this training set can be an IBM PC or a PC-compatible| computer. The C programming language is chosen. The training set is| divided into modules and is used by connecting it to the printer port of the IBM PC. This can enhance its use in the future. It is composed of twelve experiments. The students will learn the fundamental methods used in control systems, namely, digital input/output, analog to digital conversion, digital to analog conversion, timer/counter, interrupt, data communication, and programming in control system, and can apply these methods to some other projects. The training set speed is about 30 kHz measured with a 386-40 MHz microcomputer, which determines the execution speed of data input/output instructions; the speed can be faster with further development. The training set expands the single printer port to 256 ports of 8-bit data, with an interrupt request signal, so it can be used as a development tool for a microprocessor system.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (151 pages)
MAJOR : 1621 IDNO. : C515777 ISBN : 974-632-703-8
NAME : นายธีระ ภัทราพรนันท์
Teera Phatrapornnant
TOPICS: การรู้จำเสียงพูดสระภาษาไทยโดด ๆ
ไม่ขึ้นกับผู้พูดโดยการวัดสเปกตรัมดิสแตนซ์และใช้ไดนามิกไทม์วาร์ปปิง
Speaker-Independent Isolated Thai Spoken Vowel Recognition By Using Spectrum Distance Measurement and Dynamic Time Warping
ADVISOR : รศ.ดร.สมชาย จิตะพันธ์กุล
Asso. Prof. Somchai Jitapunkul, Ph.D.
DEPARTMENT OF Master. Engineering (Digital Signal Processing)
KEYWORDS : RECOGNITION % SPEAKER-INDEPENDENT % ISOLATED THAI SPOKEN
ABSTRACT :
Speaker-independent isolated Thai vowel recognition by using spectrum distance measurement and Dynamic Time Warping technique are applied with 5 trained persons and 5 non-trained persons. There are 24 Thai vowel reference templates and each reference is represented by one template. Two reference sets are used in this thesis, first reference set is unclassified group and second is classified group. By reference template created from 10 persons, the first reference set's accuracy percentage of 5 trained person is 84.44 and its 5 non-trained persons is 83.33. The second reference set's accuracy percentage of 5 trained person is 90.83 and its 5 non-trained persons is 86.17. Otherwise, this system can discriminate 5 tone of Thai from 3 Thai vowel /a:/, /i:/, and /u:/ by calculating mean square error with tone's reference formula. The accuracy percentage of testing with 5 males and 5 females is 81.00

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (85 pages)
MAJOR : 1621 IDNO. : C515804 ISBN : 974-632-835-2
NAME : นายวัชรพันธ์ ประเสริฐสิทธิ์
Watcharaphan Prasertsith
TOPICS: ระบบควบคุมแบบฟัซซีลอจิก
Fuzzy Logic Control System
ADVISOR : รศ.ดร.สุวลัย กลั่นความดี
Asso.Prof. Suvalai Glankwamdee, Ph.D.
DEPARTMENT OF Master. Engineering (Control System)
KEYWORDS : CONTROL SYSTEM % FUZZY SET % FUZZY LOGIC
ABSTRACT :
Fuzzy control is an alternative for controlling process. It does not require exact mathematical model in the design of control system but imitates human determination using imprecise control law. In this thesis, a computer program --running on a microcomputer-- is developed in order to study fuzzy control. This program serves as a control system, which is capable of being PID controllers or a fuzzy controller, for small processes. User can enter control law for a fuzzy controller in form of the predefined if-then form. Using this control system, the control of a laboratory scale heat-exchanger plant has been implemented. The resulted time responses of fuzzy control are better than those of PID control.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (193 pages)
MAJOR : 1621 IDNO. : C518812 ISBN : 974-634-029-8
NAME : นายสายสนิท พูนสวัสดิ์
Saysanith Phounsavath
TOPICS: การกำหนดการผลิตระยะสั้นในระบบพลังน้ำ-พลังความร้อนที่พิจารณาถึงการส่งออกกำลังไฟฟ้า
Short - Term Hydro - Thermal Scheduling with Export Power Considerations
ADVISOR : ศ.ดร.จรวย บุญยุบล%อ.ดร.บัณฑิต เอื้ออาภรณ์
Prof.Dr. Charuay Boonyubol, Ph.D.%Dr. Bundhit Eua-Arporn, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : HYDRO-THERMAL SCHEDULING % EXPORT POWER %
ABSTRACT :
This thesis presents a method for solving the short-term hydro-thermal scheduling with export power considerations. The generation scheduling is formulated as a mathematical optimization problem, having power export profit as an objective function and constraints comprising contracted interchange, hydro and thermal generation, system load and power balance. A decomposition-coordination technique is employed to solve the problem which is decomposed into 3 classes of local subproblems,i.e. optimum scheduling of power export, optimum scheduling of hydro power plants and optimum scheduling of thermal power plants. The linear programming,dynamic programming,and unit commitment are employed in solving the optimum scheduling of power export, optimum scheduling of hydro power plants and optimum sheduling of thermal power plants, respectively. All the local subproblems are coordinated among themselves by lagrangian multiplier,which is a dual variable associated with the corresponding constraints. In this thesis a computer program has been developed on a 32 bit microcomputer using microsoft-FORTRAN programming language and tested by a sample power system,taking into account the correlation of power export and power generation. The system is modified from the actual data of thermal and hydro generating units of Electricity Generating Authority of Thailand (EGAT) and Electricite Du Laos (EDL). The result shows that the proposed method provides the optimum proportion among exported power, hydro and thermal generated power, i.e. in the period of high exported energy price, the amount of exported power and the hydro generated power are high whereas the amount of the thermal generated power has to be decreased. However, in the period of low exported energy price, the amount of exported power and the amount of hydro generated power are low, while the amount of thermal generated power is increased. With the developed method, the maximum profit of the system can be obtained.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (59 pages)
MAJOR : 1621 IDNO. : C615490 ISBN : 974-632-558-2
NAME : นายเดชา รัตนาธาร
Decha Rattanatharn
TOPICS: การรู้จำตัวอักษรพิมพ์ภาษาไทยโดยใช้เทคนิคแบบฟัซซีโลจิกและวิธีซินแทกติก
Thai Printed Characters Recognition Using the Fuzzy Logic Technique and Syntactic Method
ADVISOR : รศ.ดร.สมชาย จิตะพันธ์กุล
Asso.Prof. Somchai Jitapunkul, Dr.Ing.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : FUZZY LOGIC % SYNTACTICIC METHOD % THAI CHARACTER
ABSTRACT :
The objective of this thesis is to recognize the Thai printed characters by using Fuzzy Logic technique and Syntactic method. The recognition process is divided into three main steps, preprocessing,pattern representation and classification. Preprocessing step is composed of input image noise reduction and thinning process which was modified to improve the result. Pattern presentation step is composed of vectorization and vector to postfix tree of primitive transformation. Classification step is composed of syntactic tree structure analysis , global feature analysis and Fuzzy Logic technique by unique similarity measure for unrecognized case. 120 Thai printed characters are used for templates and other 1106 characters are used for test patterns. The recognition rate is about 99.64 percent and average recognition time for 486DX2- 66 microcomputer is 0.89 second per character.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (66 pages)
MAJOR : 1621 IDNO. : C615535 ISBN : 974-632-942-1
NAME : นายกิตติพงษ์ เจนวิถีสุข
Kittipong Chenwithisuk
TOPICS: การรู้จำตัวอักษรพิมพ์ภาษาไทยโดยใช้นิวรอลเน็ตเวิร์กและวิธีซินแทกติก
Thai Printed Characters Recognition Using A Neural Network And the Syntactic Method
ADVISOR : รศ.ดร.สมชาย จิตะพันธ์กุล
Asso.Prof. Somchai Jitapunkul, Dr.Ing.
DEPARTMENT OF Master. Engineering (Digital Signal Processing)
KEYWORDS : RECOGNITION % NEURAL NETWORK % SYNTACTIC
ABSTRACT :
The objective of This research is to study the Thai printed characters recognition using a neural network and the syntactic method. The recognition system consists of 3 modules, a preprocessing model, a feature/primitive extraction system and a neural network. In the preprocessing process, an input character pattern is improved by noise reduction procedure and skeletonized. In the feature/primitive extraction process, the character is decomposed into primitives consisting of line-primitives and circle-primitives. Then, the recognition system is trained by a neural network. After the training is completed, the neural network will distinguish the input character from the set of primitive different types of input character patterns. The result indicates a high (98.93 - 99.57 percent) character patterns recognition rate. A total of 1392 character data samples, including regular font style, bold font style and italic font style, were partitioned into a training set (690 samples) and a testing set (702 samples). The recognition rate of regular font style is 99.57 percent. The recognition rate of italic font style is 98.93 percent. The recognition rate of bold font style is 99.36 percent. Consequently, the total average recognition rate and the average time, operated by the 486DX2-66 computer, are 99.28 percent and 0.055 second/character respectively.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (121 pages)
MAJOR : 1621 IDNO. : C615603 ISBN : 974-633-250-3
NAME : นายพิจารณ์ ประกิจ
Pijarn Prakij
TOPICS: การปรับค่าพารามิเตอร์ของตัวควบคุมพีไอดีโดยใช้ฟัซซีลอจิก
Pid Controller Parameters Tuning Using Fuzzy Logic
ADVISOR : อ.ดร.สมบูรณ์ จงชัยกิจ
Somboon Chongchaikit, D.Ing.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : PID CONTROLLER TUNING % FUZZY SET % FUZZY LOGIC
ABSTRACT :
This thesis presents a method for PID controller tuning. The tuning starts from gathering data of process response to step setpoint change. The parameters tuning is based on knowledgebase and rulebase in fuzzy logic system which can appropriately represent the human decision making. These knowledgebase and rulebase are deduced from experience of industrial process control experts. Experiments with process simulation software and process plant model show satisfactory result. This thesis can be developed to apply in industrial process control system.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (146 pages)
MAJOR : 1621 IDNO. : C615693 ISBN : 974-633-236-8
NAME : ร้อยเอก สุรเดช เคารพครู
Suradech Kaoropcroo
TOPICS: การประมาณหาที่ตั้งแหล่งกำเนิดสัญญาณจากการวัดมุมทิศโดยใช้วิธีคาลแมนฟิลเตอร์แบบยืดขยาย
Emitter Location Estimation from Bearing Angle Measurements By the Extended Kalman Filter Method
ADVISOR : รศ.ดร.สมชาย จิตะพันธ์กุล%น.อ.ดร.เพียร โตท่าโรง
Asso.Prof.Dr. Somchai Jitapunkul, Dr. Ing.%Dr. Pian Totarong, Ph.D.
DEPARTMENT OF Master. Engineering (Digital Signal Processing)
KEYWORDS : EMITTER LOCATION % BEARING ANGLE % EXTENDED KALMAN FILTER
ABSTRACT :
The location of an emitter source can be determined from bearing angle measurements of the known location of passive observers. The emitter position can be obtained from the measured bearing angles by using the triangulation method. Since the measured bearing angles are noisy, the lines of bearing will not intersect at the same point. If there are three lines of bearing, the error triangle is formed. That is, the location estimation method is required to achieve the optimal emitter position within the vicinity of the error area. In this thesis, the Extended Kalman Filter is proposed to estimate the emitter position in the case of multiple stationary observers. Numerical simulations are performed to compare the accuracy of the proposed method with various conventional methods. The simulations indicate that the performance of Extended Kalman Filter gives the most accurate results.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (126 pages)
MAJOR : 1621 IDNO. : C615794 ISBN : 974-632-998-7
NAME : นางสาววัลยา วัชรบุศราคำ
Wanlaya Watcharabudsarakham
TOPICS: โปรแกรมแปลงโปรโตคอลจาก ISDN ไปเป็น X.25
An ISDN-TO-X.25 Protocol Conversion Program
ADVISOR : อ.ดร.วาทิต เบญจพลกุล
Watit Benjapolakul, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : PROTOCOL % ISDN % X.25 % FRAME % MESSAGE
ABSTRACT :
The objective of this thesis is to develope a program that simulates interface system between user and network system by using two microcomputers connected in ISDN protocol and an ISDN-toX.25 protocol conversion program run on a simulated network microcomputer. During user-network interface procedure, the program shows each frame that is sent through serial port. From 40 connections test, with different sending procedures and/or the number of USER INFORMATION messages v we can conclude that successful connection is 100 percent in condition that successful frame transmission is 98.2 percent. In addition the ISDN-to-X.25 protocol conversion program can detect mandatory basic fields in each ISDN frame (only frames that related to X.25 frames) and map or change them to l appropriate fields in CCITT X.25 protocol.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (114 pages)
MAJOR : 1621 IDNO. : C615806 ISBN : 974-633-228-7
NAME : นายวรรณวิทย์ กมลเดชเดชา
Wannawit Kamondajdacha
TOPICS: การศึกษาระบบควบคุมลำดับโดยทฤษฎีเพทริเน็ต
A Study on Sequence Control System by Petri Net Theory
ADVISOR : อ.ดร.สมบูรณ์ จงชัยกิจ
Somboon Chongchaikit, D.Ing.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : PETRI NET % SEQUENCE CONTROL % PROGRAMMABLE CONTROLLER
ABSTRACT :
This thesis concerns the study of sequence control system based on Petri Net Theory. Main works are to design develop and test a software tool for modeling and analysis of the performance of system by reachability tree method. This software is developed on Microsoft Windows which is GUI (Graphical User Interface). User can create Petri Net model by using graphic editor. The model can quickly be analysed to improve the efficiency of system.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (77 pages)
MAJOR : 1621 IDNO. : C715451 ISBN : 974-633-710-6
NAME : นายชัยวิทย์ พู่วณิชย์
Chaivit Poovanich
TOPICS: การนำแนวทางเชิงวัตถุมาพัฒนาโปรแกรมจำลองการทำงานวงจรไฟฟ้าบนไมโครซอฟต์วินโดวส์
An Object-Oriented Approach to Develop A Circuit Simulation Program on The Microsoft Windows
ADVISOR : รศ.ดร.เอกชัย ลีลารัศมี
Asso.Prof. Ekachai Leelarasmee, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : OBJECT-ORIENTED % CIRCUIT SIMULATION
ABSTRACT :
This thesis presents various classes that are obtained from an object-oriented analysis for designing an electronic circuit simulation program on the Microsoft Windows. This program has a graphical user interface that receives an input from a user in a form of a schematic diagram. The program is also able to perform 3 types of simulation; i.e. DC, Transient and AC, by using the same algorithms that were used in circuit simulation program "LEK 6.0". The designed classes are modified to work with a special class library, called MFC (Microsoft Foundation Class Library), for writing a prototype circuit simulation program that can add; a new electronic component into the program by deriving a component class from the designed! classes and defining specified data and methods of the derived class without any effect to the classes that control the program.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (84 pages)
MAJOR : 1621 IDNO. : C615806 ISBN : 974-633-358-5
NAME : นายวรรณวิทย์ กมลเดชเดชา
Methee Hwangkhunnatham
TOPICS: การศึกษาระบบควบคุมลำดับโดยทฤษฎีเพทริเน็ต
Algorithms to Reduce the Simulation Time for A Time Domain Simulation of Piecewise Linear Circuit in Lek
ADVISOR : อ.ดร.สมบูรณ์ จงชัยกิจ
Asso.Prof. Ekachai Leelarasmee, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : LEK % PIECEWISE LINEAR % TRANSIENT SIMULATION
ABSTRACT :
This thesis presents new algorithms for the transient analysis of piecewise linear circuits. This algorithm uses the fact that the matrix in the linear equation solving program can only have a finite number of different values. Hence, by adding a memory management technique to store the LU factors of these matrices for future reuse, the linear equation solving can be performed much faster than that of a general-purpose algorithm in which these LU factors have to be recomputed every time. Since most of the CPU analysis time is spent in solving linear equations, the new algorithm can actually speed up the transient analysis of piecewise linear circuits significantly (100-600 percent). Two algorithms will be shown. The first is a Matrix Cache algorithm which stores LU factors for future reuse. The second is a Partial LU factor algorithm which enables the Matrix Cache algorithm to reduce memory storage for handling large circuits.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (118 pages)
MAJOR : 1621 IDNO. : C715694 ISBN : 974-634-092-1
NAME : นายประดิษฐ์ มิตราปิยานุรักษ์
Pradit Mittrapiyanuruk
TOPICS: ระบบตรวจสอบภาพชิ้นงานโดยใช้พีซีสำหรับการตรวจสอบฉลากที่พิมพ์บนขวด
A PC-Based Visual Inspection System for Inspecting Printed Label on Bottles
ADVISOR : รศ.กฤษดา วิศวธีรานนท์%รศ.ดร.เอกชัย ลีลารัศมี
Asso.Prof. Krisada Visavateeranon%Asso.Prof. Ekachai Leelarasmee, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : PC-BASED % VISUAL INSPECTION % IMAGE PROCESSING % DEFECT
ABSTRACT :
This thesis presents development of an automated visual inspection system for defect detection of printed label on bottles by using a personal computer (PC). The system is composed of a CCD camera, a frame grabber card, a video monitor, a light source, a digital input/output card and a PC Two inspection algorithms are developed The first algorithm is based on the object's image pixel counting that can also be used for general purpose inspection. The second algorithm is specially developed for detecting the defect of printed label on bottles. It is based on the pixel-by-pixel image comparison between the defect-free reference label image and the inspected label image. The Model-Fitting technique is also utilized for exactly registering of both images before comparison The prototype system and developed algorithms are tested on 100 printed labels From the results, it can be conclude that the first algorithm has a short inspection time, of only 0.82 second per label, while the second algorithm needs much more inspection time but has a very high inspection accuracy.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (72 pages)
MAJOR : 1621 IDNO. : C715908 ISBN : 974-633-223-6
NAME : นายสุรัตน์ ตันเทอดทิตย์
Surat Tanterdtid
TOPICS: การประยุกต์ใช้ฮอปฟิลด์เนตสำหรับการกำหนดเส้นทางในโครงข่ายสื่อสารคมนาคม
Application of Hopfield Net for Routing in Telecommunication Networks
ADVISOR : อ.ดร.วาทิต เบญจพลกุล
Watit Benjapolakul
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : ROUTING % COMMUNICATION NETWORKS % HOPFIELD NET
ABSTRACT :
This research proposes the application of Hopfield net, a type of neural network, in communication networks routing. The routing constraints are minimum number of links between any pair of nodes, minimum delay time in the route and minimum congestion state of the nodes in the route which is chosen to be the path of the route. A new method of initialization, which is adaptive with the state of communication networks traffic, is proposed. It can also be applied to the dynamic routing problem. The effect of constant parameters in the equation of motion of neural network and the effect of the constant parameter in the transfer function of neuron, to the speed and characteristics of the energy variation are tested and analyzed. Computer simulation shows that this application gives a more accurate solution than the conventional method solution, which was presented by Lee and Chang in 1993 and also helps alleviate the suboptimum problem.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (66 pages)
MAJOR : 1621 IDNO. : C715915 ISBN : 974-634-075-1
NAME : นายธนัญ จารุวิทยโกวิท
Tanun jaruvitayakovit
TOPICS: หน่วยเชื่อมต่อโครงข่าย ISDN สำหรับเครื่องคอมพิวเตอร์ส่วนบุคคลผ่านทางพอร์ต RS232
An ISDN Interface Unit for Personal Computer VIA the RS232 Port
ADVISOR : อ.ดร.วาทิต เบญจพลกุล
Watit Benjapolakul, D.Eng
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : ISDN % INTERFACE % RS232
ABSTRACT :
The objective of this study is to design and implement an ISDN Interface unit for personal computers via the RS232 port (TE), as a model for future development. Testing by an Assembly language for microcontroller 8051, the ISDN interface unit for personal computer via the RS232 port can communicate with LT-S, which is a simulator of ISDN network at S reference point, in Layer 1, 2 and 3 of OSI model according to ITU-Recommendation I.430-431, Q.920-921 and Q.930-931 respectively. Interfacing between ISDN network and Terminal Equipment can be established by activation request either from LT-S or from the TE. After the system was activated, the ISDN Interface unit for personal computer via the RS232 communicates with LT-S in order to request terminal equipment number (TEI), to establish communication link, send data and release communication link on D channel. In addition, the ISDN Interface unit for personal computers via the RS232 port can also establish communication link, send data and release communication link on B channel. By Testing, an error occurs in sending data in D and B channel process. If TE sends a data frame which have lengths of 28 to 32 bytes, the percentage of accuracy is in the range of 80 to 95 percent.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (66 pages)
MAJOR : 1621 IDNO. : C715923 ISBN : 974-634-357-2
NAME : นายธีรพงษ์ สิทธิกุลธร
Teerapong Sittigultorn
TOPICS: การออกแบบอุปกรณ์สื่อสารปลายทางในระบบ ISDN มาตรฐานแบบแถบความถี่แคบ สำหรับการขอใช้บริการส่งสัญญาณเสียง
Design of Terminal Equipment in Narrow Band Standard ISDN For Speech Communication Service
ADVISOR : ผศ.ดร.ประสิทธิ์ ทีฆพุฒิ
Asst.Prof. Prasit Teeraput, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : ISDN % N-ISDN % ITU-T
ABSTRACT :
This thesis has the objectives on design and implementation of terminal equipment for narrow band standard ISDN at S interface using basic rate access interface structure. The purposes are to build and develop the infrastructure of hardware and software which are necessary for developing the better performance ISDN terminal equipments. This terminal equipment conforms to the ITU-T I.430-I. 431 and ITU-T Q.920-Q.921, including a sample software which conforms only to the ITU-T Q.930-Q.931 for setup and cancel services for speech communication in B channel, like a guide line for using the infrastructure which had been made. Hardware of this terminal equipment is composed of PEB2085 by Siemens, AG. for interfacing to ISDN network at S interface, and 8031 by Intel Corporation. for main processor. For software, it is developed by 8031 assembly language. This terminal equipment could operate properly by following the ITU-T I.430-I.431 and ITU-T D 9200.921 standard requirements and the ITU-T Q.930-Q.931 under assigned specifications also.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (90 pages)
MAJOR : 1621 IDNO. : C715972 ISBN : 974-634-118-9
NAME : นายวิเชียร แซ่โล้ว
Vichean Low
TOPICS: เครื่องอ่านคำไทยพยางค์เดี่ยวแบบปรับความเร็วได้
A Variable Speed Thai Monosyllabic Word Text-To Speech Reader
ADVISOR : รศ.ดร.เอกชัย ลีลารัศมี
Asso.Prof. Ekachai Leelarasmee, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : SYNTHESIZER % SPEECH COMPRESSION % THAI MONOSYLLABLE %
ABSTRACT :
This thesis describes the development of a Thai text-to-speech reader capable of voice reading of any string of Thai monosyllabic words separated by blanks. The reading speed can be adjusted in 4 steps without changing the pitch frequency and the voice quality. The silence duration between syllables can also be varied by inserting special command codes in the string. This reader provides a serial port which behaves as a null modem for receiving input strings from ,any external device such as a personal computer. The hardware of this text-to-speech reader consists mainly of an 8-bit microcontroller with a 32-Kbyte RAM and a 64-Kbyte ROM, a 3 Mbyte sound ROM, an 8-bit digital-to-analog converter(DAC), and a speaker. The sound ROM stores the digitized waveforms of all diphones that were sampled at 16 kHz with 8 bit resolution and compressed using the lossless adaptive differential pulse code modulation (LADPCM) technique. The voice reading mechanism of each syllable is done by the microcontroller, which reads the waveforms of the predetermined diphones from the sound ROM, concatenates them and sends the concatenated waveforms to the speaker through the DAC converter. The software of the microcontroller is divided into several modules for performing different tasks. The major tasks are 1) analysis of each Thai monosyllable word into 4 parts, i.e., initial consonant, vowel, tone and final consonant using a novel rule-based technique. 2) formation of international phonetic alphabets representing the voice of the analysis word. 3) determination of the diphones that can be concatenated to produce the voice of a given Thai syllable, based upon the research work of the Linguistics Research Unit, Chulalongkorn University. 4) decompression of voice data from the sound ROM.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (89 pages)
MAJOR : 1629 IDNO. : C317789 ISBN : 974-633-165-5
NAME : น.อ.วีระชัย เชาว์กำเนิด
Weerachai Chaokumnerd
TOPICS: การวิเคราะห์สมรรถนะของการสวิตช์กลุ่มข้อมูลสามเส้นทางชนิดNxN แบบไม่มีการติดขัดภายในที่มีความสามารถในการจัดเรียงลำดับกลุ่มข้อมูล
Performance Analysis of A Threel-Path, NxN Nonblocking Packet Switch with Resequencing Capability
ADVISOR : รศ.ดร.ประสิทธิ์ ประพิณมงคลการ
Asso.Prof. Prasit Prapbmongkolkarn, Ph.D.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : PACKET SWITCH % NONBLOCKING % RESEQUENCING
ABSTRACT :
This dissertation is a study on the packet switch system to be used in communication networks nowadays, for delivering the packets from the source to the destination. Even though the congestion of the packet problem still occurs, which leads to the theory of a general model M/M/C queue for the switch path application to be adapted for solving congestion problems when the packets at the head-of-lir.e position have the same destination. To rake these packets pass through C paths simultaneously, two disciplines for the switching path apply: The First In First Out (FIFO), and the Random Order of Rervice (ROS); also the study is done on the resequencing delay at the destination. The response time of the system is calculated by the proposed method in this study. It is assumed that C has three switch paths working 50 percent under the offered load. In the case of the FIFO method with C equal 1, the total delay (the time spent for sending packets from the source to the destination plus resequencing delay) is about 2.5 percent longer than the system response time without resequencing delay. And if C equal 2, 3, the total delay and the system response time are equal. In the ROS method at C equal 1. the total delay is about 8.5 percent longer than the system response time; and when C equal 2, 3, the total delay is about 1.1 percent longer than system response time.

CU - THESIS ABSTRACT ACADEMIC YEAR : 1995 (195 pages)
MAJOR : 1629 IDNO. : C515853 ISBN : 974-633-233-3
NAME : นายวิโรจน์ บุญโกสุมภ์
Wirote Boonkosum
TOPICS: ไดโอดเปล่งแสงแบบฟิล์มบางในช่วงที่ตามองเห็นชนิดวัสดุอะมอร์ฟัสซิลิคอนอัลล อยและการประยุกต์ใช้งานในออปโตอิเล็กทรอนิกส์
Visible-Light Amorphous Silicon Alloy Thin Film Fight Emitting Diodes and their Applications in Optoelectronics
ADVISOR : ผศ.ดร.ดุสิต เครืองาม%ศ.ดร.สมศักดิ์ ปัญญาแก้ว
Asst.prof. Dusit Kruangam, DR.%Prof. Somsak Panyakeow, DR.
DEPARTMENT OF Master. Engineering (Electrical Engineering)
KEYWORDS : THIN FILM LIGHT EMITTING DIODE % AMORPHOIJS SILICON ALLOY %
ABSTRACT :
A novel Thin Film Light Emitting Diode (TFLED) has been developed for the first time. The TFLED has a basic structure of glass/ITO/ p-i-n layers of amorphous silicon alloys/AI. The amorphous silicon alloys employed in this work are wide optical energy gap materials, so-called, hydrogenated amorphous silicon nitride (a-SiN:H), hydrogenated amorphous carbide (a-SiC:H) and hydrogenated amorphous silicon oxide (a-SiO:H). The TFLED can emit the visible light having the colors from red, orange, yellow to green and white-blue depending on the optical energy gap of the i-layer. A detailed study has been done on the basic properties including structural properties (IR absorption, ESR), optical properties (absorption coefficient, optical energy gap, photoluminescence) and electrical properties (conductivity) of the amorphous films. The TFLED is a carrier-injection type electroluminescent device. The light output comes from the radiative recombination of holes and electrons injected from the p- and n-layers, respectively, into the i-layer. The typical bias voltage is about 5-15 volt, the injection current density is about 100-1000 mA/cm('2), giving the brightness of about 0.11 cd/m('2). The theoretical and experimental results show that the optimal thickness of the i-layer is about 500 A. A study has been done on the effect of the material used in the i-layer on the performances of the TFLED. The result shows that the TFLED with a-SiC:H as the i-layer gives the highest brightness, while a-SiN:H gives the brightness better than a-SiO:H. A series of trials has also been done on the improvement of the brightness of the TFLED. The first attempt is to improve the radiative recombination efficiency by using a metal substrate instead of a glass substrate. The metal substrate is good thermal conductive material so that it can dissipate heat from the TFLED to the ambient with better efficiency than a glass substrate. The other attempt is to improve the injection efficiency of holes by using p-type highly-conductive and wide optical energy gap amorphous silicon oxide (p-uSiO:H) and microcrystalline silicon oxide (p-uc-SiO:H) instead of conventional p-a-SiC:H. The result shows that the brightness was improved to the level of 10 cd/m(,2). A series of experiments has been done on the fabrication of TFLED displays that can emit light with desired emitting patterns. A new type of dot matrix TFLED display has also been proposed and fabricated l for the first time. The screen; size for the demonstration is 8 x 8 cm('2). In tlus thesis a new type of amorphous photocoupler having the amorphous TFLED as a light source and the amorphous silicon solar cell as a detector has been developed for the first time. The advantages of the amorphous TFLED are as follows: 1) low-cost, because the TFLED is made from low-cost amorphous materials and uses a low temperature CVD process (190 Degree C), 2) it has the possibility to be produced as a large area display, 3) it can be deposited on various substrates, such as glass, metal, plastic, ceramic sheets; therefore various forms of displays can be realized, etc.