Som
language
Quick introduction
The aim
of Som
language is for
teaching. It has been used in computer architecture class to teach how
high
level programming languages and machine codes are related. The whole
language translation
process is simple enough that students can modify it to generate code
for their
architectural studies. The whole compiler and code generator is
around
2500 lines of Som. Here is an example from a part of the compiler, the action routines.
Som has a familiar syntax, it is designed to be minimal to make
it easy
to understand. It has a simple static memory model for
efficiency, and it
also has dynamic allocation for flexibility. The source is
compiled into
an efficient intermediate code (s-code family)
which
runs on its virtual machine (around 300 lines of C). It also has
an
interactive mode, an expression can be typed in and is evaluated
immediately. Som has a minimal set of operators as it is intended
to be
used as a teaching tool. It has small set of reserved words:
to,
if,
else,
while,
for,
case, break, enum.
See the following example:
>
print
2
+ 3 nl
5
> to sq x = x * x
> print sq 4 nl
16
>
Code Release
The release includes all source of
compiler
system
(in Som)
and the virtual machine (in C) and the executable vm compiled on
Windows XP
platform, Vista and Windows 7.
It also
contains a
bit of test file and examples. The whole package is very small
100K-300K
bytes (zip).
Earlier
versions
Release history
Language Manual
Part I The language
Part II Internals
Part III VM
Part IV Miscellaneous
Appendix
How to get
Som
Document
How
to
compile Som suite
How to generate som.obj (for som
v 2.4)
Example session
Happy birthday Som (2008)
Publications
related to Som language,
stack-processors
and
virtual
machines
- Thontirawong, P. and
Chongstitvatana,
P., "Augmenting a Stack-based Virtual Machine with One-address
Instructions for Performance Enhancement", Int. Conf. on Embedded
Systems and Intelligent Technology, Bangkok, Feb 27-29, 2008. ( pdf
)
- Chongstitvatana, P., "Threaded
Language As a Form of Partial Evaluator", invited paper in National
Conf. of Computer Science and Engineering, Thailand, 19-21
November 2007. ( pdf
) (link
to
web
for
the
code)
- Satayavibul, C. and
Chongstitvatana,
P., "An embedded processor with instruction packing", Electrical
Engineering, Electronics, Computer, Telecommunications and Information
Technology (ECTI) International Conference, Chiang Rai, Thailand, 9-12
May 2007, pp.1135-1138. ( pdf
)
- Lertteerawattana, W.,
Jedsadawaranon,
T. and Chongstitvatana, P., "Instruction Packing for a 32-bit
Stack-Based Processor", International Joint Conference on Computer
Science and Software Engineering, Thailand, 2-4 May 2007,
pp.126-130. (
pdf
) ( presentation
)
- Chongstitvatana, P., "Stack
Frame
Caching", invited paper in Proc. of National Conf. on Computer Science
and Engineering, Khon
Kan, Thailand,
23-25
Oct.
2006.
(
pdf )
- Sattayawiboon, C.,
Sripornprasert, J.,
Tansutthiwess, S., Tonteerawong, P., and Chongstitvatana, P., "A
stack processor with integrated display circuit for a low cost CD-ROM
reading device", ECTI International Conference, May 10-13, Thailand,
2006.
- Chongstitvatana, P., "A compact
code
16-bit processor for embedded applications", Joint conf. of computer
science and software engineering, Nov 2005, Thailand.
(
pdf )
- Chongstitvatana, P.,
"Self-generating
systems: how to a 10,000,000_2 line compiler assembles itself", invited
paper, 8th National Computer Science and Engineering Conference,
Bangkok, Thailand, October 27-28, 2005. ( pdf
)
- Nanthanavoot, P.,
Burutarchanai, A.,
and Chongstitvatana, P., "Instruction packing for a 32-bit resource
efficient processor," National Science and Technology Development
Agency (NSTDA) Annual Conference,
Thailand,
27-30
March
2005
(in
Thai). (English
abstract) ( preprint
)
- Burutarchanai, A.,
Nanthanavoot, P.,
Aporntewan, C., and Chongstitvatana, P., "A stack-based processor
for resource efficient embedded systems", Proc. of IEEE TENCON 2004,
21-24 November 2004, Thailand.
(
pdf
)
- Burutarchanai, A., Kotrajaras,
V. and
Chongstitvatana, P., "A fast instruction fetch unit for an
embedded stack processor", Proc. of Int. Conf. on Information and
Communication Technologies (ICT 2004), 18-19 November, 2004. Thailand.
(
pdf )
- Burutarchanai, A., and
Chongstitvatana, P., "Design of a two-phased clocked control unit for
performance enhancement of a stack processor", National Computer
Science and Engineering Conference, Thailand, 21-22 Sept. 2004,
pp.114-119. (English
abstract) (pdf
in
Thai)
- Nanthanavoot P. and
Chongstitvatana,
P., "Code-Size Reduction for Embedded Systems using Bytecode
Translation Unit", Conf. of Electrical/Electronics, Computer,
Telecommunications, and Information Technology (ECTI), Thailand, 13-14
May 2004. ( pdf
)
- Chongstitvatana, P., "The art
of
instruction set design", invited paper in Conf. of Electrical
Engineering, Thailand,
2003.
(
pdf )
- Kotrajaras, N.,
Chongstitvatana, P.,
"Nibbling Java byte code of resource-critical devices", National
Computer Science and Engineering Conference, Thailand,
2003.
(
pdf )
- Chongstitvatana, P. and
Kotrajaras,
V., "Instruction compression by nibble coding: war on the old front",
IEEE Thailand section: Silver Jubilee Symposium, 15 Nov 2002. ( pdf
)
- Nanthanavoot, P. and
Chongstitvatana,
P., "Development of a data reading device for a CD-ROM drive with FPGA
technology", Conf. of Electrical
Engineering, Thailand,
2002.
(
pdf
)
- Wongsiriprasert, C. and
Chongstitvatana, P., "Performance comparison between two virtual
machine interpreters : stack-based vs. register-based", Proc. of 3rd
Annual National Symposium on Computational Science and Engineering, Bangkok, 1999,
pp. 401-406. (pdf)
- Chongstitvatana, P., "Post
processing
optimization of byte-code instructions by extension of its virtual
machine", 20th Electrical Engineering Conference, Thailand,
1997.
(pdf)
last update 5 Dec 2009