Advanced topic in digital systems   2001

Prabhas Chongstitvatana
email me
office:  Engineering building 4, floor 18, room 13,  phone 02-218-6982

Previous lecture (1999)

What's new

6 December    S2 ISA, microstep, simulator
12 December  Project in processor design  S2 assembler and simulator (bugfix)
25 December  Benchmark  S2 tools set (v 0.5)
                  S2 microsteps (complete)   S2 microstep (modified)
26 December  S2 tools set (v 0.6) RZ2 compiler session   How assember work
5   Jan 2002   RZ compiler kit page      S2 tools set (v 0.8)    RZ2 compiler tools kit explained
12 February 2002    Reading list      Itanium processor
22 February 2002    Low power design        Summary
11 March 2002      Project evaluation
. . .

Important announcement

Tuesday 18th December 2001, 10:00-11:00, midterm examination at Eng. Building 3
Scope of midterm exam, ISA design and analysis, control unit.  Chapter 1-3 Hennessy&Patterson, microprogramming, writing simple program in assembly language, calculate CPI.

Project due date  Friday 18th January 2002, 4pm  at my office.

Presentation of the paper of your choice    Wed 20th February 2002 in the class.

The final exam. will be held on Thursday 7 March 2002, 9:00-12:00am at the seminar room, floor 17, Eng. building 4.

Aim

To present the state of the art in the processor design.  The topic covers preliminaries and performance driven design.  I assume that students already familiar themselves with at least one or two subjects in computer organisation and hardware design.  The knowledge of compilation technology is not required.  We will discuss instruction level parallelism and cache memory design.

The course is divided into three parts:  lecture, work examples and research materials.  The first part will be normal lectures with assignments.  I expect students to hand-in works every week.  This part is a kick start to get yourself into the subject (after long years away from classes !).  The second part is the "hand-on".  I will emphasise simulation of a working processor at the  instruction set level, including the control unit and pipeline.  (I don't think we will be able to do a vector processor).  The final part will be conducted based on materials from research journals.  I am looking into Intel Itanium architecture and low power design.

Topic by Week

  1. Introduction to computer architecture:  The dataflow model and its sequentialisation,  Von Neumann architecture.
  2. Preliminaries: Discussion on instruction set design, performance metric.
  3. Control unit, microprogramming
  4. Pipeline
  5. S2 (32-bit version of S1)     S2 ISA S2 microsteps     S2 microsteps (modified)
  6. Superscalar
  7. VLIW
  8. Code generation  (relationships between HLL, compiler and ISA)
  9. Memory system design
  10. Speculative execution:  Itanium processor
  11. Vector machines
  12. Future architecture:  IRAM    RAW
  13. Low power design
  14. Summary of the topics of this class

Assignments

  1. Study an instruction set of a processor of your own choice.
  2. Write a simple program in an assembly language
  3. Design a microprogram for various addressing modes.
  4. Project in processor design
  5. Reading list

Tools

All programs have been tested to compile correctly under gcc (and lcc)
S1 simulator itanium.htm
S1 microprogram systems   the package
C compilers
Benchmark programs in C
S2 simulator   (version 0.1)
S2 assembler  (version 0.1)
S2 tools set    (assembler simulator  compiler-not-yet-bug-free)   (version 0.5)
S2 tools set  (version 0.6)   compiler works  with bubble.txt
Example of RZ2 compiler session
How the assembler work
RZ compiler kit page
Cache simulation and traces
 

Text

  1. Chongstitvatana, P., "Computer architecture: a synthesis", 2000.  (my textbook)
  2. H. Stone, "High-performance computer architecture", 3 ed, Addison-Wesley publishing, 1993.
  3. J. Hennessy and D. Patterson, "Computer architecture : a quantitative approach", 2 ed, Morgan Kaufmann Pub., 1996.
  4. W. Stalling, "Computer organisation", 4ed., Prentice-hall, 1996. (undergrad level text)
  5. Additional materials will be hand-out as needed.