S2

S2 is a simple 32-bit processor for educational purpose. It exists in a simulator, although some implementation at Hardware Description Language for S2 exists. S2 is developed from S1, a simple 16-bit processor used in
teaching several classes in the past 10 years. S2 has an adequate instruction set to demonstrate the high level
language and the assembly language relationships. Comparing to a real processor (such as Pentium), S2 lacks OS supporting functions, I/O and interrupts, and performance enhancing features (such as MMX).

S2 description

S2 has 32 registers, r0...r31, r0 is special and always has a zero value. S2 has 32-bit address space, it can access 4G words of memory. Addressing is in word (32-bit) unit. S2 has no byte-access instruction. All instructions are 32-bit long (fixed length, one size). S2 has flags that indicate result of previous operations.
Flags are: Z zero, S sign, C carry, O overflow/underflow.

S2 addressing mode

S2 has four addressing modes: absolute, displacement, index, and immediate. The absolute mode has 22-bit range (0..4M). The displacement mode uses one register and a 17-bit value (0..128K). The index mode employs two registers. Lastly, the immediate mode uses the literal value in the instruction. Depend on what instruction the literal is 22-bit (load/store) or 17-bit (arithmetic). For example, to load a value from memory into a register, all four addressing modes are as follows:

ld r1,ads         R[r1] = M[ads]                 absolute
ld r1,#n          R[r1] = n                      immediate
ld r1,d(r2)       R[r1] = M[ d + R[r2] ]         displacement
ld r1,(r2+r3)     R[r1] = M[ R[r2] + R[r3] ]     index

The opcode format and assembly language format for S2 follow the tradition dest = source1 op source2 from
PDP, VAX and IBM S360.

S2 instruction set
S2 opcode encoding
S2 micro steps

(to be continued)

last update 2 June 2003